1. Field of the Invention
The present invention generally relates to tessellation of three-dimensional surface patches and more specifically to computing tessellation coordinates of output vertices using dedicated hardware.
2. Description of the Related Art
The programming model for tessellation hardware has evolved to expose new shader programs that are executed to perform tessellation of three-dimensional surface patches. Some of the tessellation operations may be performed in parallel and do not require floating point precision arithmetic.
Accordingly, what is needed in the art is an improved system and method for performing tessellation operations using a combination of programmable circuitry and fixed function circuitry.